Improvements in the transistor performance of relevant semiconductor chips were achieved reductions (scaling) almost always in the first place. But in recent years, the production experts have more and more difficult to continue this trend.
Transistors seem to be a solution for the problem with multiple gates. They provide better control of on / off state of the transistor and allow relatively high driver rates (on-state) at lower supply voltages.
While the upcoming international VLSI technology Symposium wants Intel technical details of his current tri-gate 22 nm CMOS technology on bulk Silicon present, was converted into a series production.
The Tri-gate CMOS technology consists of completely impoverished Tri-gate transistors, the magnitude of which is specified in nm, with only eight, as well as a high-k/metal gate stack technology of the third generation. In addition the latest strained silicon.
The excellent specifications of technology proven to provide the Intel researchers produced a SRAM memory with 380 MB with three different cell structures: Two highly complex cells with 0.092 µm2 or 0.108 µm2 (low-voltage), as well as a high-performance version with for 0.130 µm2. The SRAM memory functioning with 4.6 GHz at 1 V.
20 nm-Planar bulk CMOS technology
The traditional scale of Planar transistors is always still quite attractive – especially if newest Gatestack material and optimized strained silicon with belong to production technology.
While the Symposium will be the IBM Alliance with a planar 20 sign nm bulk CMOS technology for the mobile electronics for words, with the ICs can be made almost twice as complex fall compared with the current versions in 28 nm technology and will have also double driver flows. Image: Cross section of a planar bulk CMOS chips, which shows the extremely narrow arrangement (64 nm) of metal compounds. Credit: H. Shang, IBM Alliance.
The new process technology offers multiple threshold voltages, very fast input / output elements, highly complex (0,081 µm2) and very fast, static memory, and an improved BEOL (back-end-of-line) structure with a distance (pitch) of 64 nm.
